TOM 1 - Silicon Photonics and Guided-Wave Optics

Location: 
Adlershof con. vent. Exhibition Centre - Rudower Chaussee 17 - 12489 Berlin - Germany
Duration: 
26 September 2016 - 30 September 2016

Chairs

  • Graham Reed, University of Southampton (UK)
  • Antti Säynätjoki, Aalto University and University of Eastern Finland (FI)
  • Seppo Honkanen, Microsoft (FI)

Program Committee

  • Graham Reed, University of Southampton (UK)
  • Antti Säynätjoki, Aalto University and University of Eastern Finland (FI)
  • Seppo Honkanen, Microsoft (FI)
  • Matthieu Roussey, University of Eastern Finland, (FI)


Invited Speakers

  • Roel Baets, Ghent University (BE)
  • Sang Bae Lee, Optical Society of Korea (KR)
  • Marc Sorel, Glasgow University (UK)


Synopsis

The focus of this topical meeting is to explore new trends and applications, particularly, in the field of Silicon Photonics, but also in Guided-Wave Optics and related areas in general. The applications range from devices for data center applications to biosensing. New developments on fiber and planar waveguide lasers, fiber non-linearities, nanophotonics materials and devices will also be welcome. Potential topics include, but are not limited to, the design, simulation, modeling and fabrication of optical interconnects, (all) optical (on chip) routing architectures and technologies as well as related design concepts for high speed, low power photonic integrated circuits (PICs). Also (CMOS-compatible) optical sources and detectors and the optimization of light emission and absorption for data processing using materials such as SiGe or III/IVs etc. will be discussed. Advanced monolithic and hybrid processing techniques for the fabrication of photonic structures will also be explored. Finally, devices and strategies for the advancement of PICs in silicon and other materials, including advances in testing and packaging would also be welcome.

Topics include:

  • Design, simulation, modeling and fabrication of optical interconnects
  • (All) optical (on chip) routing architectures and technologies
  • Related design concepts for high speed, low power photonic integrated circuits (PICs)
  • (CMOS-compatible) optical sources and detectors
  • Optimization of light emission
  • Absorption for data processing using materials such as SiGe or III/IVs
  • Advanced monolithic and hybrid processing techniques for the fabrication of photonic structures
  • Devices and strategies for the advancement of PICs in silicon and other materials (including advances in testing and packaging )
  • Hybrid and monolithic integration on silicon platforms
  • Strategies for wafer scale testing
  • Strategies for coupling to and from photonic circuits
  • Low power silicon modulators
  • Athermal device design